As a wafer inspection apparatus, there is known, for example, a burn-in inspection apparatus or a probe apparatus that inspects electrical characteristics of a multiple number of semiconductor devices formed on a wafer.
FIG. 9 is a cross sectional view illustrating a schematic configuration of a conventional probe apparatus, and FIG. 10 is a cross sectional view illustrating a pogo frame (pogo ring) in the conventional probe apparatus of FIG. 9.
Referring to FIG. 9, a probe apparatus 100 includes a loader chamber 101 serving as a wafer transfer section for transferring a wafer W; and an inspection chamber 102 for performing therein an inspection of electrical characteristics of a multiple number of semiconductor devices formed on the wafer W. This probe apparatus 100 is configured to inspect the electrical characteristics of the semiconductor devices by controlling various types of devices in the loader chamber 101 and the inspection chamber 102 under the control of a controller. The inspection chamber 102 includes a mounting table 106, a pogo frame 109, a probe card 108, and an alignment device 110. The mounting table 106 mounts thereon a wafer W loaded from the loader chamber 101 and is configured to be movable in X, Y, Z and θ directions. The pogo frame 109 is disposed above the mounting table 106, and the probe card 108 is supported on the pogo frame 109. The alignment device 110 is configured to perform alignment (position adjustment) between a multiple number of probes (inspection needles) of the probe card 108 and electrodes of the semiconductor devices formed on the wafer W in cooperation with the mounting table 106. After the wafer W and the probe card 108 are aligned with each other by the alignment device 110 and the mounting table 106 in cooperation, each probe of the probe card 108 is brought into contact with the electrodes of the wafer W, so that electrical characteristics of the multiple number of semiconductor devices formed on the wafer W are inspected (see, for example, Patent Document 1).
In FIG. 10, the pogo frame 109 is supported by a conversion ring 112 and is fastened to an upper plate of the probe apparatus 100 via the conversion ring 112. The pogo frame 109 includes an opening 109A formed through a central portion of the pogo frame 109 in its thickness direction; and a ring portion 109B surrounding the opening 109A. A multiple number of pogo pins 109C are arranged to penetrate the ring portion 109B in the thickness direction thereof. The pogo pins 109C are in contact with connecting terminals 108A formed on a periphery portion of the probe card 108 disposed under the pogo frame 109. The pogo pins 109C serve to electrically connect probes 108B provided on a central portion of a bottom surface of the probe card 108 with a non-illustrated inspection apparatus. The probes 108B are brought into contact with corresponding electrodes of the semiconductor devices, which are placed under the probes 108B, formed on the wafer W. A stiffener 113 made of, e.g., a flat plate-shaped metal member is provided within the opening 109A of the pogo frame 109 in order to prevent deformation of the probe card 108.
Since semiconductor devices may be used in a high temperature atmosphere, inspection of the electrical characteristics of the semiconductor devices formed on the wafer may also be performed in a high temperature state. The wafer and the probe card may expand and contract as temperature varies. Accordingly, in a high temperature atmosphere of, e.g., about 90° C., positions of the electrodes of the semiconductor devices formed on the wafer and positions of the probes provided on the probe card may be deviated from each other due to a difference in their thermal expansion coefficients. As a result, the probes of the probe card may not be accurately brought into contact with the corresponding electrodes of the semiconductor devices, so that the inspection of the electrical characteristics of the semiconductor devices may not be performed appropriately.
To solve the problem, in the conventional probe apparatus, a low-expansion material having a thermal expansion coefficient close to that of the wafer W may be used as the stiffener disposed within the opening 109A of the pogo frame 109. In this way, the thermal expansion coefficients of the wafer W and the probe card 108 fastened to the pogo frame 109 may be apparently made equivalent to each other. As a result, a discrepancy in positions of the probes of the probe card 108 and positions of the electrodes of the semiconductor devices on the wafer W may be reduced.
Patent Document 1: Japanese Patent Laid-open Publication No. 2004-140241
However, in a wafer inspection apparatus concerned in the present disclosure, a multiple number of inspection chambers are arranged in a 3-dimensional grid shape, and it is attempted to reduce the weight and the size of the inspection apparatus by sharing many devices by, for example, aligning wafers in a common place other than the respective inspection chambers. Accordingly, in each inspection chamber, a stiffener for obtaining required stiffness is not provided. Further, in the wafer inspection apparatus concerned in the present disclosure, each inspection chamber is configured as a whole contact type apparatus allowing all the probes formed on the probe card are brought into contact with all the electrodes of the semiconductor devices formed on the wafer at one time. For this configuration, the multiple number of pogo pins are inserted over an entire surface of the pogo frame that supports the probe card, and, thus, the stiffness of the probe card fastened to the pogo frame is obtained. Further, since there is no extra space for accommodating therein a stiffener, the stiffener has not been provided.
That is, in the wafer inspection apparatus concerned in the present disclosure, it is not possible to make a thermal expansion coefficient of the probe card apparently equivalent to a thermal expansion coefficient of the wafer by selecting a material for the stiffener as in the conventional probe apparatus, and, thus, it is not possible to resolve a discrepancy in the positions of the electrodes of the semiconductor devices formed on the wafer and the positions of the probes formed on the probe card due to a difference in temperature variation. Accordingly, it is required to resolve such a discrepancy.